## diffname bitsy/io.h 2000/0831
## diff -e /dev/null /n/emeliedump/2000/0831/sys/src/9/bitsy/io.h
0a
/* replicated in part from the boot code, for now */
#define XTAL 3686400
#define CORECLOCK 199066000
#define MONITOR 0x00020000
#define SYS_REGBASE 0x90000000
#define SYSR_FIRQ 0x1000
#define SYSR_IRQ 0x1400
#define SIRQ_PCI (1<<2)
#define SIRQ_UART (1<<8)
#define SYSR_UART_SR 0x3400 /* UART Status Register */
#define SYSR_UART_CR 0x3800 /* UART Control Register */
#define SYSR_UART_DR 0x3C00 /* UART Data Register */
#define SYS_FIRQ (0x90000000+SYSR_FIRQ)
#define SYS_IRQ (0x90000000+SYSR_IRQ)
#define PCI_REGBASE 0x42000000
#define PCI_IPXRESET 0x07C
#define PCI_IRQSTATUS 0x180
#define PCI_IRQRSTATUS 0x184
#define PCI_IRQENABLE 0x188
#define PCI_IRQENA_SET 0x188
#define PCI_IRQENA_CLR 0x18C
#define PCI_IRQSOFT 0x190
#define PCI_FIRQSTATUS 0x280
#define PCI_FIRQRSTATUS 0x284
#define PCI_FIRQENABLE 0x288
#define PCI_FIRQENA_SET 0x288
#define PCI_FIRQENA_CLR 0x28C
#define PCI_FIRQSOFT 0x290
#define PCI_TIMERLOAD 0x300
#define PCI_TIMERVALUE 0x304
#define PCI_TIMERCTL 0x308
#define PCI_TIMERCLEAR 0x30C
#define TIMER_OFF 0x020
#define TIMER1_LOAD (PCI_REGBASE+PCI_TIMERLOAD)
#define TIMER1_VALUE (PCI_REGBASE+PCI_TIMERVALUE)
#define TIMER1_CTL (PCI_REGBASE+PCI_TIMERCTL)
#define TIMER1_CLEAR (PCI_REGBASE+PCI_TIMERCLEAR)
#define TIMER_PERIODIC (1<<6)
#define TIMER_ENABLE (1<<7)
#define IRQ_STATUS (PCI_REGBASE+PCI_IRQSTATUS)
#define IRQ_ENABLE_SET (PCI_REGBASE+PCI_IRQENA_SET)
#define IRQ_ENABLE_CLR (PCI_REGBASE+PCI_IRQENA_CLR)
#define FIRQ_OFF 0x100
#define IRQ_SOFT 1
#define IRQ_TIMER1 4
#define IRQ_TIMER2 5
#define IRQ_TIMER3 6
#define IRQ_TIMER4 7
#define IRQ_DOOR 15
#define IRQ_DMA1 16
#define IRQ_DMA2 17
#define IRQ_PCI 18
#define IRQ_DMA1NB 20
#define IRQ_DMA2NB 21
#define IRQ_BIST 22
#define IRQ_SERR 23
#define IRQ_I2OIN 25
#define IRQ_POWER 26
#define IRQ_DTIMER 27
#define IRQ_PARITY 28
#define IRQ_MABORT 29
#define IRQ_TABORT 30
#define IRQ_DPARITY 31
#define PCI_CONF1_BASE 0x52000000
#define PCI_CONF0_BASE 0x53000000
#define PCI_IO_BASE 0x54000000
#define PCI_IO_SIZE 0x00010000
#define PCI_MEM_BASE 0x60000000
#define PCI_MEM_SIZE 0x20000000
/* MMU. */
#define MMUCR_M_ENABLE (1<<0) /* MMU enable */
#define MMUCR_A_ENABLE (1<<1) /* Address alignment fault enable */
#define MMUCR_C_ENABLE (1<<2) /* (data) cache enable */
#define MMUCR_W_ENABLE (1<<3) /* write buffer enable */
#define MMUCR_PROG32 (1<<4) /* PROG32 */
#define MMUCR_DATA32 (1<<5) /* DATA32 */
#define MMUCR_L_ENABLE (1<<6) /* Late abort on earlier CPUs */
#define MMUCR_BIGEND (1<<7) /* Big-endian (=1), little-endian (=0) */
#define MMUCR_SYSTEM (1<<8) /* System bit, modifies MMU protections */
#define MMUCR_ROM (1<<9) /* ROM bit, modifies MMU protections */
#define MMUCR_F (1<<10) /* Should Be Zero */
#define MMUCR_Z_ENABLE (1<<11) /* Branch prediction enable on 810 */
#define MMUCR_I_ENABLE (1<<12) /* Instruction cache enable on SA110 */
#define SDRAM_BASE 0xC0000000
#define SDRAM_RESV (16*1024*1024)
#define SDRAM_SIZE (32*1024*1024)
#define PMEM_BASE (SDRAM_BASE+SDRAM_RESV)
#define PMEM_TOP (SDRAM_BASE+SDRAM_SIZE)
#define KTOP (KZERO + (SDRAM_SIZE - SDRAM_RESV))
#define SLOW_BASE 0x38400000
#define SLEDOFFSET 0x00108000
#define LEDADDR (SLOW_BASE+SLEDOFFSET)
#define SACADDR 0x08100000
.
## diffname bitsy/io.h 2000/0904
## diff -e /n/emeliedump/2000/0831/sys/src/9/bitsy/io.h /n/emeliedump/2000/0904/sys/src/9/bitsy/io.h
1,112c
/*
* all register offsets are relative to 0x8000000 so that
* IOZERO can be changed at some future point
*/
#define IOA(t, x) ((t*)(IOZERO|x))
.
## diffname bitsy/io.h 2000/0906
## diff -e /n/emeliedump/2000/0904/sys/src/9/bitsy/io.h /n/emeliedump/2000/0906/sys/src/9/bitsy/io.h
5d
2,3c
* Definitions for IO devices. Used only in C.
.
## diffname bitsy/io.h 2000/0907
## diff -e /n/emeliedump/2000/0906/sys/src/9/bitsy/io.h /n/emeliedump/2000/0907/sys/src/9/bitsy/io.h
3a
typedef struct Uartregs Uartregs;
Uartregs *uart3regs;
.
## diffname bitsy/io.h 2000/1001
## diff -e /n/emeliedump/2000/0907/sys/src/9/bitsy/io.h /n/emeliedump/2000/1001/sys/src/9/bitsy/io.h
5a
/*
* IRQ's defined by SA1100
*/
enum
{
IRQgpio0= 0,
IRQgpio1= 1,
IRQgpio2= 2,
IRQgpio3= 3,
IRQgpio4= 4,
IRQgpio5= 5,
IRQgpio6= 6,
IRQgpio7= 7,
IRQgpio8= 8,
IRQgpio9= 9,
IRQgpio10= 10,
IRQgpiohi= 11,
IRQlcd= 12,
IRQudc= 13,
IRQuart1b= 15,
IRQuart2= 16,
IRQuart3= 17,
IRQmcp= 18,
IRQssp= 19,
IRQdma0= 20,
IRQdma1= 21,
IRQdma2= 22,
IRQdma3= 23,
IRQdma4= 24,
IRQdma5= 25,
IRQtimer0= 26,
IRQtimer1= 27,
IRQtimer2= 28,
IRQtimer3= 29,
IRQsecond= 30,
IRQrtc= 31,
};
/*
* GPIO lines (signal names from compaq document). _i indicates input
* and _o output.
*/
enum
{
PWR_ON_i= 1<<0, /* power button */
UP_IRQ_i= 1<<1, /* microcontroller interrupts */
LDD8_o= 1<<2, /* LCD data 8-15 */
LDD9_o= 1<<3,
LDD10_o= 1<<4,
LDD11_o= 1<<5,
LDD12_o= 1<<6,
LDD13_o= 1<<7,
LDD14_o= 1<<8,
LDD15_o= 1<<9,
CARD_IND1_i= 1<<10, /* card inserted in PCMCIA socket 1 */
CARD_IRQ1_i= 1<<11, /* PCMCIA socket 1 interrupt */
CLK_SET0_o= 1<<12, /* clock selects for audio codec */
CLK_SET1_o= 1<<13,
L3_SDA_io= 1<<14, /* UDA1341 interface */
L3_MODE_o= 1<<15,
L3_SCLK_o= 1<<16,
CARD_IND0_i= 1<<17, /* card inserted in PCMCIA socket 0 */
KEY_ACT_i= 1<<18, /* hot key from cradle */
SYS_CLK_i= 1<<19, /* clock from codec */
BAT_FAULT_i= 1<<20, /* battery fault */
CARD_IRQ0_i= 1<<21, /* PCMCIA socket 0 interrupt */
LOCK_i= 1<<22, /* expansion pack lock/unlock */
COM_DCD_i= 1<<23, /* DCD from UART3 */
OPT_IRQ_i= 1<<24, /* expansion pack IRQ */
COM_CTS_i= 1<<25, /* CTS from UART3 */
COM_RTS_oi= 1<<26, /* RTS to UART3 */
OPT_IND_i= 1<<27, /* expansion pack inserted */
};
.
## diffname bitsy/io.h 2000/1007
## diff -e /n/emeliedump/2000/1001/sys/src/9/bitsy/io.h /n/emeliedump/2000/1007/sys/src/9/bitsy/io.h
79a
enum
{
/* hardware counter frequency */
ClockFreq= 3686400,
Stagesize= 1024,
Nuart = 4,
/* soft flow control chars */
CTLS= 023,
CTLQ= 021,
};
typedef struct PhysUart PhysUart;
typedef struct Uart Uart;
/* link twixt hardware and software */
struct PhysUart
{
void (*enable)(Uart*, int);
void (*disable)(Uart*);
void (*kick)(void*);
void (*flow)(void*);
void (*intr)(Ureg*, void*);
void (*dobreak)(Uart*, int);
void (*baud)(Uart*, int);
void (*bits)(Uart*, int);
void (*stop)(Uart*, int);
void (*parity)(Uart*, int);
void (*modemctl)(Uart*, int);
void (*rts)(Uart*, int);
void (*dtr)(Uart*, int);
long (*status)(Uart*, void*, long, long);
};
/* software representation */
struct Uart
{
QLock;
int type;
int dev;
int opens;
void *regs;
PhysUart *phys;
int enabled;
Uart *elist; /* next enabled interface */
char name[NAMELEN];
uchar sticky[4]; /* sticky write register values */
ulong freq; /* clock frequency */
uchar mask; /* bits/char */
int baud; /* baud rate */
int parity; /* parity errors */
int frame; /* framing errors */
int overrun; /* rcvr overruns */
/* buffers */
int (*putc)(Queue*, int);
Queue *iq;
Queue *oq;
Lock rlock; /* receive */
uchar istage[Stagesize];
uchar *ip;
uchar *ie;
int haveinput;
Lock tlock; /* transmit */
uchar ostage[Stagesize];
uchar *op;
uchar *oe;
int modem; /* hardware flow control on */
int xonoff; /* software flow control on */
int blocked;
int cts, dsr, dcd, dcdts; /* keep track of modem status */
int ctsbackoff;
int hup_dsr, hup_dcd; /* send hangup upstream? */
int dohup;
int kinuse; /* device in use by kernel */
Rendez r;
};
.
## diffname bitsy/io.h 2000/1008
## diff -e /n/emeliedump/2000/1007/sys/src/9/bitsy/io.h /n/emeliedump/2000/1008/sys/src/9/bitsy/io.h
166a
/* general purpose I/O lines control registers */
typedef struct GPIOregs GPIOregs;
struct GPIOregs
{
ulong level; /* 1 == high */
ulong direction; /* 1 == output */
ulong set; /* a 1 sets the bit, 0 leaves it alone */
ulong clear; /* a 1 clears the bit, 0 leaves it alone */
ulong rising; /* rising edge detect enable */
ulong falling; /* falling edge detect enable */
ulong edgestatus; /* writing a 1 bit clears */
ulong altfunc; /* turn on alternate function for any set bits */
};
extern GPIOregs *gpioregs;
/* extra general purpose I/O bits, output only */
enum
{
EGPIO_prog_flash= 1<<0,
EGPIO_pcmcia_reset= 1<<1,
EGPIO_exppack_reset= 1<<2,
EGPIO_codec_reset= 1<<3,
EGPIO_exp_nvram_power= 1<<4,
EGPIO_exp_full_power= 1<<5,
EGPIO_lcd_3v= 1<<6,
EGPIO_rs232_power= 1<<7,
EGPIO_lcd_ic_power= 1<<8,
EGPIO_ir_power= 1<<9,
EGPIO_audio_power= 1<<10,
EGPIO_audio_ic_power= 1<<11,
EGPIO_audio_mute= 1<<12,
EGPIO_fir= 1<<13, /* not set is sir */
EGPIO_lcd_5v= 1<<14,
EGPIO_lcd_9v= 1<<15,
};
extern ulong *egpioreg;
.
51,78c
GPIO_PWR_ON_i= 1<<0, /* power button */
GPIO_UP_IRQ_i= 1<<1, /* microcontroller interrupts */
GPIO_LDD8_o= 1<<2, /* LCD data 8-15 */
GPIO_LDD9_o= 1<<3,
GPIO_LDD10_o= 1<<4,
GPIO_LDD11_o= 1<<5,
GPIO_LDD12_o= 1<<6,
GPIO_LDD13_o= 1<<7,
GPIO_LDD14_o= 1<<8,
GPIO_LDD15_o= 1<<9,
GPIO_CARD_IND1_i= 1<<10, /* card inserted in PCMCIA socket 1 */
GPIO_CARD_IRQ1_i= 1<<11, /* PCMCIA socket 1 interrupt */
GPIO_CLK_SET0_o= 1<<12, /* clock selects for audio codec */
GPIO_CLK_SET1_o= 1<<13,
GPIO_L3_SDA_io= 1<<14, /* UDA1341 interface */
GPIO_L3_MODE_o= 1<<15,
GPIO_L3_SCLK_o= 1<<16,
GPIO_CARD_IND0_i= 1<<17, /* card inserted in PCMCIA socket 0 */
GPIO_KEY_ACT_i= 1<<18, /* hot key from cradle */
GPIO_SYS_CLK_i= 1<<19, /* clock from codec */
GPIO_BAT_FAULT_i= 1<<20, /* battery fault */
GPIO_CARD_IRQ0_i= 1<<21, /* PCMCIA socket 0 interrupt */
GPIO_LOCK_i= 1<<22, /* expansion pack lock/unlock */
GPIO_COM_DCD_i= 1<<23, /* DCD from UART3 */
GPIO_OPT_IRQ_i= 1<<24, /* expansion pack IRQ */
GPIO_COM_CTS_i= 1<<25, /* CTS from UART3 */
GPIO_COM_RTS_o= 1<<26, /* RTS to UART3 */
GPIO_OPT_IND_i= 1<<27, /* expansion pack inserted */
.
## diffname bitsy/io.h 2000/1015
## diff -e /n/emeliedump/2000/1008/sys/src/9/bitsy/io.h /n/emeliedump/2000/1015/sys/src/9/bitsy/io.h
101,102c
void (*kick)(Uart*);
.
## diffname bitsy/io.h 2000/1019
## diff -e /n/emeliedump/2000/1015/sys/src/9/bitsy/io.h /n/emeliedump/2000/1019/sys/src/9/bitsy/io.h
146,147d
144c
uchar *iw;
uchar *ir;
.
142d
## diffname bitsy/io.h 2000/1110
## diff -e /n/emeliedump/2000/1019/sys/src/9/bitsy/io.h /n/emeliedump/2000/1110/sys/src/9/bitsy/io.h
201a
/* Peripheral pin controller registers */
typedef struct PPCregs PPCregs;
struct PPCregs {
ulong direction;
ulong state;
ulong assignment;
ulong sleepdir;
ulong flags;
};
extern PPCregs *ppcregs;
/* Synchronous Serial Port controller registers */
typedef struct SSPregs SSPregs;
struct SSPregs {
ulong control0;
ulong control1;
ulong dummy0;
ulong data;
ulong dummy1;
ulong status;
};
extern SSPregs *sspregs;
.
## diffname bitsy/io.h 2000/1111
## diff -e /n/emeliedump/2000/1110/sys/src/9/bitsy/io.h /n/emeliedump/2000/1111/sys/src/9/bitsy/io.h
78a
/* Peripheral Unit GPIO pin assignments: */
GPIO_SSP_TXD_o= 1<<10, /* SSP Transmit Data */
GPIO_SSP_RXD_i= 1<<11, /* SSP Receive Data */
GPIO_SSP_SCLK_o= 1<<12, /* SSP Sample CLocK */
GPIO_SSP_SFRM_o= 1<<13, /* SSP Sample FRaMe */
/* ser. port 1: */
GPIO_UART_TXD_o= 1<<14, /* UART Transmit Data */
GPIO_UART_RXD_i= 1<<15, /* UART Receive Data */
GPIO_SDLC_SCLK_io= 1<<16, /* SDLC Sample CLocK (I/O) */
GPIO_SDLC_AAF_o= 1<<17, /* SDLC Abort After Frame */
GPIO_UART_SCLK1_i= 1<<18, /* UART Sample CLocK 1 */
/* ser. port 4: */
GPIO_SSP_CLK_i= 1<<19, /* SSP external CLocK */
/* ser. port 3: */
GPIO_UART_SCLK3_i= 1<<20, /* UART Sample CLocK 3 */
/* ser. port 4: */
GPIO_MCP_CLK_i= 1<<21, /* MCP CLocK */
/* test controller: */
GPIO_TIC_ACK_o= 1<<21, /* TIC ACKnowledge */
GPIO_MBGNT_o= 1<<21, /* Memory Bus GraNT */
GPIO_TREQA_i= 1<<22, /* TIC REQuest A */
GPIO_MBREQ_i= 1<<22, /* Memory Bus REQuest */
GPIO_TREQB_i= 1<<23, /* TIC REQuest B */
GPIO_1Hz_o= 1<<25, /* 1 Hz clock */
GPIO_RCLK_o= 1<<26, /* internal (R) CLocK (O, fcpu/2) */
GPIO_32_768kHz_o= 1<<27, /* 32.768 kHz clock (O, RTC) */
.
## diffname bitsy/io.h 2000/1116
## diff -e /n/emeliedump/2000/1111/sys/src/9/bitsy/io.h /n/emeliedump/2000/1116/sys/src/9/bitsy/io.h
250a
/* Multimedia Communications Port controller registers */
typedef struct MCPregs MCPregs;
struct MCPregs {
ulong control0;
ulong reserved0;
ulong data0;
ulong data1;
ulong data2;
ulong reserved1;
ulong status;
ulong reserved[11];
ulong control1;
};
extern MCPregs *mcpregs;
.
## diffname bitsy/io.h 2000/1118
## diff -e /n/emeliedump/2000/1116/sys/src/9/bitsy/io.h /n/emeliedump/2000/1118/sys/src/9/bitsy/io.h
265a
/*
* PCMCIA support code.
*/
typedef struct PCMmap PCMmap;
typedef struct PCMslot PCMslot;
typedef struct PCMconftab PCMconftab;
typedef struct Cisdat Cisdat;
/*
* Map between ISA memory space and PCMCIA card memory space.
*/
struct PCMmap {
ulong ca; /* card address */
ulong cea; /* card end address */
ulong isa; /* local virtual address */
int len; /* length of the ISA area */
int attr; /* attribute memory */
};
/* configuration table entry */
struct PCMconftab
{
int index;
ushort irqs; /* legal irqs */
uchar irqtype;
uchar bit16; /* true for 16 bit access */
struct {
ulong start;
ulong len;
} io[16];
int nio;
uchar vpp1;
uchar vpp2;
uchar memwait;
ulong maxwait;
ulong readywait;
ulong otherwait;
};
/* cis memory walking */
struct Cisdat
{
uchar *cisbase;
int cispos;
int cisskip;
int cislen;
};
/* a card slot */
struct PCMslot
{
Lock;
int ref;
long memlen; /* memory length */
uchar slotno; /* slot number */
void *regs; /* i/o registers */
void *mem; /* memory */
void *attr; /* attribute memory */
/* status */
uchar special; /* in use for a special device */
uchar already; /* already inited */
uchar occupied;
uchar battery;
uchar wrprot;
uchar powered;
uchar configed;
uchar enabled;
uchar busy;
/* cis info */
ulong msec; /* time of last slotinfo call */
char verstr[512]; /* version string */
uchar cpresent; /* config registers present */
ulong caddr; /* relative address of config registers */
int nctab; /* number of config table entries */
PCMconftab ctab[8];
PCMconftab *def; /* default conftab */
/* for walking through cis */
Cisdat;
/* maps are fixed */
PCMmap memmap;
PCMmap attrmap;
};
.
79c
/* Peripheral Unit GPIO pin assignments: alternate functions */
.
## diffname bitsy/io.h 2000/1121
## diff -e /n/emeliedump/2000/1118/sys/src/9/bitsy/io.h /n/emeliedump/2000/1121/sys/src/9/bitsy/io.h
355a
extern PowerRegs *powerregs;
.
320,354c
ulong pmcr;
ulong pssr;
ulong pspr;
ulong pwer;
ulong pcfr;
ulong ppcr;
ulong pgsr;
ulong posr;
.
317,318c
/*
* power management
*/
typedef struct PowerRegs PowerRegs;
struct PowerRegs
.
315a
extern MemConfRegs *memconfregs;
.
311,314c
ulong mdcnfg; /* dram */
ulong mdcas00; /* dram banks 0/1 */
ulong mdcas01;
ulong mdcas02;
ulong msc0; /* static */
ulong msc1;
ulong mecr; /* pcmcia */
ulong mdrefr; /* dram refresh */
ulong mdcas20; /* dram banks 2/3 */
ulong mdcas21;
ulong mdcas22;
ulong msc2; /* static */
ulong smcnfg; /* SMROM config */
.
308,309c
typedef struct MemConfRegs MemConfRegs;
struct MemConfRegs
.
291,305c
/* bit shifts for pcmcia access time counters */
MECR_io0= 0,
MECR_attr0= 5,
MECR_mem0= 10,
MECR_fast0= 11,
MECR_io1= MECR_io0+16,
MECR_attr1= MECR_attr0+16,
MECR_mem1= MECR_mem0+16,
MECR_fast1= MECR_fast0+16,
.
271,289c
enum
.
269c
* memory configuration
.
120,191d
118a
Uartregs *uart3regs;
.
110,117c
ulong ctl[4];
ulong dummya;
ulong data;
ulong dummyb;
ulong status[2];
.
108c
/* hardware registers */
typedef struct Uartregs Uartregs;
struct Uartregs
.
6a
enum
{
/* hardware counter frequency */
ClockFreq= 3686400,
};
.
4,5d
## diffname bitsy/io.h 2000/1122
## diff -e /n/emeliedump/2000/1121/sys/src/9/bitsy/io.h /n/emeliedump/2000/1122/sys/src/9/bitsy/io.h
111a
/*
* edge argument for gpiointrenable
*/
enum
{
GPIOrising,
GPIOfalling,
GPIOboth,
};
.
## diffname bitsy/io.h 2000/1123
## diff -e /n/emeliedump/2000/1122/sys/src/9/bitsy/io.h /n/emeliedump/2000/1123/sys/src/9/bitsy/io.h
251,258c
ulong pmcr; /* Power manager control register */
ulong pssr; /* Power manager sleep status register */
ulong pspr; /* Power manager scratch pad register */
ulong pwer; /* Power manager wakeup enable register */
ulong pcfr; /* Power manager general configuration register */
ulong ppcr; /* Power manager PPL configuration register */
ulong pgsr; /* Power manager GPIO sleep state register */
ulong posr; /* Power manager oscillator status register */
.
## diffname bitsy/io.h 2000/1205
## diff -e /n/emeliedump/2000/1123/sys/src/9/bitsy/io.h /n/emeliedump/2000/1205/sys/src/9/bitsy/io.h
119a
IRQ,
.
113c
* types of interrupts
.
## diffname bitsy/io.h 2001/0618
## diff -e /n/emeliedump/2000/1205/sys/src/9/bitsy/io.h /n/emeliedump/2001/0618/sys/src/9/bitsy/io.h
261a
/*
* reset controller
*/
enum
{
RCSR_hwr = 0x00000001, /* hw reset */
RCSR_swr = 0x00000002, /* sw reset */
RCSR_wdr = 0x00000004, /* watch dog */
RCSR_smr = 0x00000008, /* sleep mode reset */
RCSR_all = 0x0000000f,
};
typedef struct ResetRegs ResetRegs;
struct ResetRegs
{
ulong rsrr; /* reset controller software reset register */
ulong rcsr; /* reset controller status register */
};
extern ResetRegs *resetregs;
typedef struct OSTimerRegs OSTimerRegs;
struct OSTimerRegs
{
ulong osmr[4]; /* match registers */
ulong oscr; /* counter register */
ulong ossr; /* status register */
ulong ower; /* watchdog enable register */
ulong oier; /* timer interrupt enable register */
};
extern OSTimerRegs* timerregs;
typedef struct Intrregs Intrregs;
struct Intrregs
{
ulong icip; /* pending IRQs */
ulong icmr; /* IRQ mask */
ulong iclr; /* IRQ if bit == 0, FRIQ if 1 */
ulong iccr; /* control register */
ulong icfp; /* pending FIQs */
ulong dummy1[3];
ulong icpr; /* pending interrupts */
};
extern Intrregs *intrregs;
typedef struct Gpclkregs Gpclkregs;
struct Gpclkregs
{
ulong r0;
ulong r1;
ulong dummya;
ulong r2;
ulong r3;
};
extern Gpclkregs *gpclkregs;
.
248a
/* Power management ops */
enum {
PCFR_suspend = 1,
PCFR_opde = 1,
PCFR_fp = 2,
PCFR_fs = 4,
PCFR_fo = 8,
};
.
133c
extern Uartregs *uart3regs;
extern Uartregs *uart1regs;
.
## diffname bitsy/io.h 2001/0818
## diff -e /n/emeliedump/2001/0618/sys/src/9/bitsy/io.h /n/emeliedump/2001/0818/sys/src/9/bitsy/io.h
231,243c
ulong mdcnfg; /* 0x00 dram */
ulong mdcas00; /* 0x04 dram banks 0/1 */
ulong mdcas01; /* 0x08 */
ulong mdcas02; /* 0x0c */
ulong msc0; /* 0x10 static */
ulong msc1; /* 0x14 */
ulong mecr; /* 0x18 pcmcia */
ulong mdrefr; /* 0x1c dram refresh */
ulong mdcas20; /* 0x20 dram banks 2/3 */
ulong mdcas21; /* 0x24 */
ulong mdcas22; /* 0x28 */
ulong msc2; /* 0x2c static */
ulong smcnfg; /* 0x30 SMROM config */
.
225a
REFR_kapd= 29,
REFR_eapd= 28,
REFR_k1db2= 22,
REFR_slfrsh= 31,
.
## diffname bitsy/io.h 2002/0518
## diff -e /n/emeliedump/2001/0818/sys/src/9/bitsy/io.h /n/emeliedump/2002/0518/sys/src/9/bitsy/io.h
290d
269,276c
ulong pmcr; /* 0x0 Power manager control register */
ulong pssr; /* 0x4 Power manager sleep status register */
ulong pspr; /* 0x8 Power manager scratch pad register */
ulong pwer; /* 0xc Power manager wakeup enable register */
ulong pcfr; /* 0x10 Power manager general configuration register */
ulong ppcr; /* 0x14 Power manager PPL configuration register */
ulong pgsr; /* 0x18 Power manager GPIO sleep state register */
ulong posr; /* 0x1c Power manager oscillator status register */
.
260,265d
257,258d
## diffname bitsy/io.h 2002/1112
## diff -e /n/emeliedump/2002/0518/sys/src/9/bitsy/io.h /n/emeliedump/2002/1112/sys/src/9/bitsy/io.h
325a
/*
* Dont use this on bitsy drivers.
* This is for compat with code compiled
* from the ../pc directory
*/
typedef struct Pcidev Pcidev;
typedef struct ISAConf ISAConf;
struct Pcidev { int dummy; };
struct ISAConf{ int port; int irq; };
.
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